Microprocessor & Microcontrollers

National Institute of Technology Rourkela

Year 2010 Question Paper Solution

Question 1: Differentiate among 8085, 8086, and 8088 microprocessors.

Ans 1:

  • The 8085 microprocessor is an 8 bit computer, it use the same instruction set as the even older Intel 8080.
  • The 8086/8088 microprocessor is a 16 bit computer, and it is an entirely different architecture and instruction set than the 8085.
  • The 8086 runs on a 16 bit external bus, while the 8088 runs on an 8 bit external bus,
  • Both 8086 and 8088 microprocessors are the same 16 bit processor, and both have a 20 bit address bus.
  • The 8086 is twice as fast as the 8088 in terms of data transfer rate on the bus for the same bus clock speed.
  • 8086 : 16 bit data bus & 6 byte instruction queue. Whereas 8088 : 8 bit data bus & 4 byte instruction queue.
  • 8088 which is similar in architecture to 8086 but the difference is in the available number of data bits of the data bus,they were limited to 8-bits even though the ALU is of 16-bits.


Question 2: Describe the function of 8086 queue. How does it speed up processing?

Ans 2. The function of 8086 queue are as follows.

  • The 8086 instruction queue is a buffer that holds opcode bytes that have been prefetched by the bus interface unit.
  • This speed up operations of the processor by helping to reduce fetches latency, i.e. to improve the probability that an opcode byte fetched by the processor is already available.
  • This works best when there is no branching, as a branch would invalidate the queue.
  • Advanced processors attempt to "predict" the branch, making the probability even better.
  • In 8086, a 6-byte instruction queue is presented at the Bus Interface Unit (BIU).
  • It is used to prefetch and store at the maximum of 6 bytes of instruction code from the memory.
  • Due to this, overlapping instruction fetch with instruction execution increases the processing speed. The instruction prefetch queue speeds up the processing of microprocessors by attempting to have the next opcode bytes available to the execution unit before it actually needs them. This works because, statistically, there is time spent by the execution unit in executing a particular instruction; time that the bus interface unit can use to go ahead and prefetch the next opcode bytes. Sometimes, this results in a loss of time, because the execution unit may branch to some other location.
  • Modern processors attempt to sidestep that by using branch prediction algorithms.


Question 3: What happens during DMA transfer?

Ans 3.  

  • DMA means direct memory access which is used to share the bulk of data without involving of microprocessor.
  • During this time processor is free to perform other operations - which are independent of the impending transfer being performed.
  • During DMA operation data transfer takes place directly to the peripheral devices, MPU releases the control of the buses to the DMA controller and two new signals are comes into existence, (1)hold (2)hlda(hold acknowledge)
  • THE DMA use the data bus and the microprocessor is not involved but during this time it can do other tasks which do not require the data bus such as ALU operation.
  • To make a fast data transfer, the MPU releases the control of its buses to DMA.
  • DMA acts as an external device and the active high input signal HOLD goes HIGH when the DMA is requesting to the MPU to use its buses.
  • After receiving the HOLD request from DMA, the MPU releases the buses in the following machine cycle and generates an active high output signal HLDA indicating the release of buses.Once the DMA gains that control, it acts in the role of the MPU for data transfer.
  • DMA including disk drive controllers, graphics cards, network cards and sound cards.


Question 4: What do you mean by wait state? Why it is needed?

Ans 4.

  • A wait state is a delay experienced by a microprocessor when accessing external memory or another device that is slow to respond.  The vice versa also come into scenario.
  • Now, to be able to access slow memory the microprocessor must be able to delay the transfer until the memory access is complete.
  • One way is to increase the microprocessor clock period by reducing the clock frequency. Some microprocessors provide a special control input called READY to allow the memory to set its own memory cycle time. If after sending an address out, the microprocessor does not receive a READY input from memory, it enters a wait state for as long as the READY line is in 0 states.
  • When the memory access is completed the READY goes high to indicate that the memory is ready for specified transfer.


Question 5: Differentiate between RIM and SIM instructions?

Ans 5.   

RIM FUNCTION: READ INTERRUPT MASK it will check the weather interrupt is mask or not.

SIM FUNCTION:SET INTERRUPT MASK it Used to mask the hardware interrupts.

RIM is a multipurpose instruction used to read the status of interrupts 7.5, 6.5, 5.5 and to read serial input data bit. RIM loads 8-bit data in the accumulator with the following interpretation:

Actually RIM does the following three tasks:

  • Read the interrupt mask (bit 2, 1, 0).
  • Identify pending interrupts (bit 6, 5, 4).
  • Receive serial input data bit (bit 7).

SIM is a multipurpose interrupt used to implement the 8085, interrupts (RST 7.5, 6.5, 5.5) and serial data output. SIM interprets the accumulator content as follows:

Actually, SIM does the following three tasks:

  • Mask the interrupts (bit 2, 1, 0).
  • Reset RST 7.5 (bit 4). This is mainly used to overwrite RST 7.5 without serving it.
  • To implement serial I/O (bit 7, 6). If bit 6 = 1 is used to enable serial I/O and bit 7 is used to transmit serial output data bit.

Question 6: What determines whether a microprocessor is considered an 8-bit, a 16-bit, or a 32-bit device?

Ans 6: With respect to a CPU, I'd say that it's the width of a register. You can do an operation on only 8 bits, 16-bits, 32-bits, etc. at a time.

The number of bits a CPU uses to represent integer numbers (as opposed to floating point numbers or memory addresses) is often called "register width", "word size", "bit width", "data path width", or "integer precision". This number is often considered one of the most important characteristics of a CPU.

The word size (8 bits, 16 bits, or 32 bits) of a microprocessor is the size of the data path in the execution unit. Typically, this is the size of the accumulator.

Note: This is the execution unit size, not the bus interface unit size. An example where this matters is the 8088, which is a 16 bit computer running on an 8 bit bus.

The 8085 is 8 bits. The 8086/8088 is 16 bits. The 80386 is 32 bits. Modern Intel processors are 64 bits.


Question 7: It the stack segment register contains 3000H and the stack pointer register contains 8434H, what is the physical address of the top of the stack?

Ans 7.     SS = 3000H

                 SP = 8434H

Physical Address of SP = 30000+8434 = 38434

(Note : add 0 in last of Stack Segment i.e 3000 will be 30000)

Offset Address = 3000:8434

Question 8: Differentiate between overflow flag and carry flag with an example from each.

Ans 8.

Carry is generally used for unsigned arithmetic and overflow is used for signed arithmetic. This unsigned 8-bit operation results in Carry, but no overflow (the sign of the result is correct):

0xC0 + 0xD8 = 0x98

If we're doing unsigned 8-bit arithmetic, that's fine and we're only interested in the carry bit in this case, which tells us that the "correct" answer is actually 0x198.

If we look at the same operation and the same operand values, but consider that the operands are signed, we have the equivalent:

-0x40 + -0x28 = -0x68

In this case, there is also no "overflow" and the result of the arithmetic is correct.

Consider this unsigned operation, however:

0x70 + 0x68 = 0xD8

No overflow here and no carry. The unsigned arithmetic is simple. But now look at the operands as signed values:

0x70 + -0x98 = 0x28

The answer is obviously wrong.

We have subtracted a larger number from a smaller one and ended up with a positive value.The carry is not set here, so it doesn't offer a clue of the problem.The overflow flag reveals that the "correct" signed answer is -0x28.

Overflow Flag (OF) - set if the result is too large positive number, or is too small negative number to fit into destination operand:-

This means that it cannot fit into the required bit-width, hence literally overflows out. The flag is set for such situations.

Overflow Flag (OF) - set to 1 when there is a signed overflow. For example, when you add bytes 100 + 50 (result is not in range -128...127).During unsigned operations, this has no meaning. Even if it's set it's not to be considered.



Carry Flag (CF) - set if there was a carry from or borrow to the most significant bit during last result calculation. (This is used in add/sub operations) alternative but better definition:-

Carry Flag (CF) - this flag is set to 1 when there is an unsigned overflow. For example when you add bytes 255 + 1 (result is not in range 0...255).

When there is no overflow this flag is set to 0.


Question 9: Explain the BHE signal of 8086.

Ans 9.

BHE signal means Bus High Enable signal. The BHE signal is made low when there is some read or write operation is carried out. ie .Whenever the data bus of the system is busy i.e. whenever there is some data transfer then the BHE signal is made low.

If 0 during first of bus cycle this pin indicates that at least one byte of the current transfer is to be made on pins AD15-AD8

If 1 the transfer is made on AD7-AD0. Status s7 is output during the latter part of bus assigned a meaning.

Question 10: State the advantage of the memory mapped I/O over peripheral mapped I/O.

Ans 10: If any one of you knows the answer comment if bellow.


Question 11: Explain why the number of ports in peripheral mapped I/O is restricted to 256 ports.

Ans 11.

The number of output ports in the peripheral I/O is restricted to 256 ports because the operand of the OUT instruction is 8-bits; it can have only 256 combinations.


Other Useful Info

Register operand addressing mode: operand to be specified resides in internal register of 8086

Immediate operand addressing mode: operand to be addressed is a part of instruction instead of contents of register or memory location. Used only for source operand

Memory operand addressing mode: physical address of operand is computed from segment base address and effective address according to following formula.

          EA=Base + Index +Displacement

  • Direct addressing mode: the effective address is used directly as 16/8-bit offset of storage location of operand from location specified by current value in selected segment register.
  • Register indirect addressing mode: effective address i.e. contents of register is combined with contents of DS to obtain physical address


  • Based addressing mode: effective address is calculated by adding direct or indirect displacement to contents of either base register or base pointer
  • Indexed addressing mode: value of displacement is used as a pointer to starting point of array of data in memory
  • Based indexed addressing mode: used to specify displacement for 2-D arrays. Base register specifies m coordinate and index register specifies n coordinate

Effective address=segment base:base+index+displacement


Assuming DS=0100H

  1. Direct addressing mode:
    • operand [C237H]
    • EA=DS:(disp)=01000+C237=0D237H
  2. Register indirect addressing mode:
    • operand [BX]
    • EA=DS:BX=01000+637D=0737DH
    • Operand [SI]
    • EA=DS:SI=01000+2A9B=03A9BH
  3. Based addressing mode
    • operand [BX]+C237H
    • EA=DS:BX+disp=01000+637D+C237=135B4H
  4. Indexed addressing mode:
    • operand [SI]+C237H
    • EA=DS:SI+disp=01000+2A9B+C237=0FCD2H
  5. Based indexed addressing mode:
    • operand [BX][SI]+C237H
    • EA=DS:BX+SI+disp=01000+637D+2A9B+C237=1604FH

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